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Mobil_surveillance_system 1
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00001 #include "UART1.h" 00002 00003 00005 00010 //***************************************************************************** 00011 // 00012 // Globale variables (flags) 00013 // 00014 //***************************************************************************** 00015 00017 tBoolean ge_tbUART1RXITFLAG = 0; 00018 00020 tBoolean ge_tbUART1TXITFLAG = 0; 00021 00022 //***************************************************************************** 00023 // 00024 // Globale variables 00025 // 00026 //***************************************************************************** 00027 00028 00030 tpfUART1AppendResponseCallbackFunction g_pfOnCallbackGPSAppendResponse; 00031 00032 //***************************************************************************** 00033 // 00034 // Globale variables for input buffer 00035 // 00036 //***************************************************************************** 00037 00038 00040 unsigned char g_pcUart1RxBuffer[UART1_RX_BUFFER_SIZE] = {'\0'}; 00041 00043 unsigned int g_uiUart1RxWriteIndex = 0; 00044 00046 unsigned int g_uiUart1RxReadIndex = 0; 00047 00048 //***************************************************************************** 00049 // 00050 // Globale variables for output buffer 00051 // 00052 //***************************************************************************** 00053 00056 unsigned char g_pcUart1TxBuffer[UART1_RX_BUFFER_SIZE] = {'\0'}; 00057 00059 unsigned int g_uiUart1TxWriteIndex = 0; 00060 00062 unsigned int g_uiUart1TxReadIndex = 0; 00063 00064 00065 //***************************************************************************** 00066 // 00067 // UART1 interrupt handler rutines 00068 // 00069 //***************************************************************************** 00070 00071 00073 void UART1_rxHandler(void) 00075 { 00076 // set the flag to indicate that interrupts just occurred 00077 ge_tbUART1RXITFLAG = 1; 00078 // wake up the cpu 00079 _bis_SR_register(LPM0_bits); 00080 // disable receive interrupts.. 00081 CLEAR_BIT(UC1IE,0); 00082 if(!UART1_RX_BUFFER_FULL){ 00083 // get the last received byte from the UCA1RXBUF buffer and take into the g_pcUartRxBuffer 00084 g_pcUart1RxBuffer[g_uiUart1RxWriteIndex] = UCA1RXBUF; 00085 // increase the the RX buffer write pointer 00086 UART1_ADVANCE_RX_BUFFER_INDEX(g_uiUart1RxWriteIndex); 00087 } 00088 else{ 00089 // TODO if the RX buffer is full 00090 } 00091 // enable receive interrupts 00092 SET_BIT(UC1IE,1); 00093 } 00094 00095 00096 // UART_uart1TxHandler 00097 00099 void UART1_txHandler(void) 00101 { 00102 // wake up the cpu 00103 _bis_SR_register(LPM0_bits); 00104 // set the flag to indicate that interrupts just occurred 00105 ge_tbUART1TXITFLAG = 1; 00106 } 00107 00108 00109 00110 //***************************************************************************** 00111 // 00112 // UART functions 00113 // 00114 //***************************************************************************** 00115 00116 00118 void UART1_initUART1(void) 00120 { 00121 P3OUT &= ~(BIT6+BIT7); 00122 // P3.6,7 = USCI_A1 TXD/RXD 00123 P3SEL = 0xC0; 00124 // CLK = ACLK 00125 UCA1CTL1 |= UCSSEL_1; 00126 // 9600 00127 UCA1BR0 = 0x03; // 32kHz/9600 = 3.41 00128 // 9600 00129 UCA1BR1 = 0x00; 00130 // Modulation UCBRSx = 5 00131 UCA1MCTL = UCBRS1 + UCBRS0; // 00132 // **Initialize USCI state machine** 00133 UCA1CTL1 &= ~UCSWRST; 00134 // Enable USCI_A1 RX interrupt 00135 UC1IE |= UCA1RXIE; 00136 // Enable USCI_A1 TX interrupt 00137 UC1IE |= UCA1TXIE; 00138 // Enable global interrupt 00139 _bis_SR_register(LPM3_bits + GIE); 00140 // set RX ISR callback function 00141 Interrupts_setUSCI1RX_ISRCallbackFunction(&UART1_rxHandler); 00142 // set TX ISR callback function; 00143 Interrupts_setUSCI1TX_ISRCallbackFunction(&UART1_txHandler); 00144 } 00145 00146 00148 void UART1_primeTransmit(void) 00150 { 00151 // Do we have any data to transmit? 00152 if ( !UART1_TX_BUFFER_EMPTY ){ 00153 // Disable the UARTA1 interrupt. If we don't do this there is a race 00154 // condition which can cause the read index to be corrupted. 00155 CLEAR_BIT(UC1IE,1); 00156 // if is there space avaiable in the UCA1TXBUF in other words is the first bit of 00157 // the UC1IFG set and the tx buffer is still not empty ? 00158 while((TEST_BIT(UC1IFG,1)) && !UART1_TX_BUFFER_EMPTY){ 00159 UCA1TXBUF = g_pcUart1TxBuffer[g_uiUart1TxReadIndex]; 00160 UART1_ADVANCE_TX_BUFFER_INDEX(g_uiUart1TxReadIndex); 00161 } 00162 // reenable UARTA1 interrupt, set the third bit of the UC1IE vector 00163 SET_BIT(UC1IE,1); 00164 } 00165 } 00166 00167 00169 void UART1_setAppendResponseCallbackFunction(tpfUART1AppendResponseCallbackFunction pfCallbackAppendResponse) 00171 { 00172 g_pfOnCallbackGPSAppendResponse = pfCallbackAppendResponse; 00173 } 00174 00175 00177 int UART1_read(void) 00179 { 00180 char* pcTmpBuffer = (char*)calloc('\0',sizeof(char) * (UART1_RX_BUFFER_USED + 1)); 00181 unsigned int uiUsage = UART1_RX_BUFFER_USED; 00182 unsigned int uiAvail; 00183 00184 if(!UART1_RX_BUFFER_EMPTY){ 00185 00186 for(uiAvail = 0; uiAvail < uiUsage; uiAvail++ ){ 00187 00188 pcTmpBuffer[uiAvail] = g_pcUart1RxBuffer[g_uiUart1RxReadIndex]; 00189 UART1_ADVANCE_RX_BUFFER_INDEX(g_uiUart1RxReadIndex); 00190 } 00191 00192 pcTmpBuffer[uiAvail] = '\0'; 00193 // if callback is set 00194 if(g_pfOnCallbackGPSAppendResponse){ 00195 00196 g_pfOnCallbackGPSAppendResponse((const char*)pcTmpBuffer); 00197 } 00198 } 00199 free(pcTmpBuffer); 00200 // return the number of the character read 00201 return uiUsage; 00202 } 00203 00204 00206 int UART1_write(char* pcBuffer, unsigned int uiLength) 00208 { 00209 unsigned int uiIdx; 00210 for( uiIdx = 0; uiIdx < uiLength; uiIdx++ ){ 00211 if(!UART1_TX_BUFFER_FULL){ 00212 g_pcUart1TxBuffer[g_uiUart1TxWriteIndex] = pcBuffer[uiIdx]; 00213 UART1_ADVANCE_TX_BUFFER_INDEX(g_uiUart1TxWriteIndex); 00214 } 00215 else{ 00216 // TODO if the tx buffer is full 00217 } 00218 } 00219 if(!UART1_TX_BUFFER_EMPTY){ 00220 // send as many characters to the uart buffer as many can 00221 UART1_primeTransmit(); 00222 } 00223 // return the number of the character written into the buffer 00224 return uiIdx; 00225 } 00226 00227 00229 void UART1_sendChar(void) 00231 { 00232 // do we have anything to send in the buffer ? 00233 if(!UART1_TX_BUFFER_EMPTY){ 00234 // Move as many bytes as we can into the tx buffer 00235 UART1_primeTransmit(); 00236 } 00237 // If the output buffer is empty, turn off the transmit interrupt flag. 00238 else{ 00239 // clear transmit interrupt flag (the first in the UC1IFG vector) 00240 CLEAR_BIT(UC1IFG,1); 00241 } 00242 } 00243 00244 00246 tBoolean UART1_isWritingDone(void) 00248 { 00249 return ((UART1_TX_BUFFER_EMPTY) ? 1 : 0); 00250 } 00251 00252 00254 void UART1_flushRx(void) 00256 { 00257 tBoolean tbIsInterruptEnabled = 0; 00258 // get the content of the sr register 00259 unsigned int uiStatus = _get_SR_register(); 00260 // is global interrupts enabled ? 00261 if(TEST_BIT(uiStatus,3)){ 00262 tbIsInterruptEnabled = 1; 00263 // temporarily turn off interrupts. 00264 _disable_interrupts(); 00265 } 00266 // flush the receive buffer. 00267 g_uiUart1RxWriteIndex = 0; 00268 g_uiUart1RxReadIndex = 0; 00269 // switch back interrupts 00270 if(tbIsInterruptEnabled){ 00271 _enable_interrupts(); 00272 } 00273 } 00274 00275 00277 void UART1_flushTx(void) 00279 { 00280 tBoolean tbIsInterruptEnabled = 0; 00281 // get the content of the sr register 00282 unsigned int uiStatus = _get_SR_register(); 00283 // is global interrupts enabled ? 00284 if(TEST_BIT(uiStatus,3)){ 00285 tbIsInterruptEnabled = 1; 00286 // temporarily turn off interrupts. 00287 _disable_interrupts(); 00288 } 00289 // flusch the transmit buffer 00290 g_uiUart1TxWriteIndex = 0; 00291 g_uiUart1TxReadIndex = 0; 00292 // switch back interrupts 00293 if(tbIsInterruptEnabled){ 00294 _enable_interrupts(); 00295 } 00296 }
1.7.4