Mobil_surveillance_system 1
UART2.c
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00001 #include "UART2.h"
00002 
00003 
00005 
00010 //*****************************************************************************
00011 //
00012 // Globale variables (flags)
00013 //
00014 //*****************************************************************************
00015 
00017 tBoolean ge_tbUART2RXITFLAG = 0;
00018 
00020 tBoolean ge_tbUART2TXITFLAG = 0;
00021 
00022 //*****************************************************************************
00023 //
00024 // Globale variables 
00025 //
00026 //*****************************************************************************
00027 
00029 tpfUART2AppendResponseCallbackFunction g_pfOnCallbackGPRSAppendResponse;
00030 
00031 //*****************************************************************************
00032 //
00033 // Globale variables for input buffer
00034 //
00035 //*****************************************************************************
00036 
00038 unsigned char g_pcUart2RxBuffer[UART2_RX_BUFFER_SIZE] = {'\0'};
00039 
00041 unsigned int  g_uiUart2RxWriteIndex = 0;
00042 
00044 unsigned int  g_uiUart2RxReadIndex = 0;
00045 
00046 //*****************************************************************************
00047 //
00048 // Globale variables for output buffer
00049 //
00050 //*****************************************************************************
00051 
00052 
00055 unsigned char g_pcUart2TxBuffer[UART2_RX_BUFFER_SIZE] = {'\0'};
00056 
00058 unsigned int  g_uiUart2TxWriteIndex = 0;
00059 
00061 unsigned int  g_uiUart2TxReadIndex = 0;
00062 
00063 
00064 //*****************************************************************************
00065 //
00066 // UART2 interrupt handler rutines
00067 //
00068 //*****************************************************************************
00069 
00070 
00072 void UART2_rxHandler(void)
00074 {
00075     // set the flag to indicate that interrupts just occurred
00076     ge_tbUART2RXITFLAG = 1;
00077     // wake up the cpu
00078     _bis_SR_register(LPM0_bits);
00079     // disable receive interrupts..
00080     CLEAR_BIT(IE2,0);
00081     if(!UART2_RX_BUFFER_FULL){
00082         // get the last received byte from the UCA0RXBUF buffer and take into the g_pcUartRxBuffer
00083         g_pcUart2RxBuffer[g_uiUart2RxWriteIndex] = UCA0RXBUF;
00084         // increase the the RX buffer write pointer
00085         UART2_ADVANCE_RX_BUFFER_INDEX(g_uiUart2RxWriteIndex);
00086     }
00087     else{
00088         // TODO if the RX buffer is full
00089     }
00090     // enable receive interrupts
00091     SET_BIT(IE2,1);
00092 }
00093 
00094 
00095 // UART_uart1TxHandler
00096 
00098 void UART2_txHandler(void)
00100 {
00101     // wake up the cpu
00102     _bis_SR_register(LPM0_bits);
00103     // set the flag to indicate that interrupts just occurred
00104     ge_tbUART2TXITFLAG = 1;
00105 }
00106 
00107 
00108 
00109 //*****************************************************************************
00110 //
00111 // UART2 functions
00112 //
00113 //*****************************************************************************
00114 
00115 
00117 void UART2_initUART2(void)
00119 {
00120     P3OUT &= ~(BIT4+BIT5);
00121     // P3.4,5 = USCI_A0 TXD/RXD
00122     P3SEL = 0x30;
00123     // CLK = ACLK
00124     UCA0CTL1 |= UCSSEL_0; 
00125     // 9600
00126     UCA0BR0 = 0x03;      // 32kHz/9600 = 3.41  
00127     // 9600                       
00128     UCA0BR1 = 0x00;
00129     // Modulation UCBRSx = 5
00130     UCA0MCTL = UCBRS1 + UCBRS0; // 
00131     // **Initialize USCI state machine**              
00132     UCA0CTL1 &= ~UCSWRST; 
00133     // Enable USCI_A1 RX interrupt                    
00134     IE2 |= UCA0RXIE;
00135     // Enable USCI_A1 TX interrupt     
00136     IE2 |= UCA0TXIE;  
00137     // Enable global interrupt
00138     _bis_SR_register(LPM3_bits + GIE);
00139     // set RX ISR callback function
00140     Interrupts_setUSCI0RX_ISRCallbackFunction(&UART2_rxHandler);
00141     // set TX ISR callback function;
00142     Interrupts_setUSCI0TX_ISRCallbackFunction(&UART2_txHandler);           
00143 }
00144 
00145 
00147 void UART2_primeTransmit(void)
00149 {
00150     // Do we have any data to transmit?   
00151     if ( !UART2_TX_BUFFER_EMPTY ){
00152         // Disable the UARTA0 tx interrupt. If we don't do this there is a race
00153         // condition which can cause the read index to be corrupted.
00154         CLEAR_BIT(IE2,1);
00155         // if is there space avaiable in the UCA1TXBUF in other words is the first bit of
00156         // the IFG2 set and the tx buffer is still not empty ?
00157         while((TEST_BIT(IFG2,1)) && !UART2_TX_BUFFER_EMPTY){
00158             UCA0TXBUF = g_pcUart2TxBuffer[g_uiUart2TxReadIndex];
00159             UART2_ADVANCE_TX_BUFFER_INDEX(g_uiUart2TxReadIndex);
00160         }
00161         // reenable UARTA1 interrupt, set the third bit of the UC1IE vector
00162         SET_BIT(IE2,1);
00163     }
00164 }
00165 
00166 
00168 int UART2_read(void)
00170 {
00171     char* pcTmpBuffer = (char*)calloc('\0',sizeof(char) * (UART2_RX_BUFFER_USED + 1));
00172     unsigned int uiUsage = UART2_RX_BUFFER_USED;  
00173     unsigned int uiAvail;
00174  
00175     if(!UART2_RX_BUFFER_EMPTY){
00176         
00177         for(uiAvail = 0; uiAvail < uiUsage; uiAvail++ ){
00178             
00179             pcTmpBuffer[uiAvail] = g_pcUart2RxBuffer[g_uiUart2RxReadIndex];
00180             UART2_ADVANCE_RX_BUFFER_INDEX(g_uiUart2RxReadIndex);
00181         }
00182         
00183         pcTmpBuffer[uiAvail] = '\0';
00184         // if callback is set
00185         if(g_pfOnCallbackGPRSAppendResponse){
00186             
00187             g_pfOnCallbackGPRSAppendResponse((const char*)pcTmpBuffer);
00188         }
00189     
00190     }   
00191     free(pcTmpBuffer);
00192     // return the number of the character read  
00193     return uiUsage;
00194 }
00195 
00196 
00198 int UART2_write(char* pcBuffer, unsigned int uiLength)
00200 {
00201     unsigned int uiIdx;
00202     for( uiIdx = 0; uiIdx < uiLength; uiIdx++ ){
00203         if(!UART2_TX_BUFFER_FULL){
00204             g_pcUart2TxBuffer[g_uiUart2TxWriteIndex] = pcBuffer[uiIdx];
00205             UART2_ADVANCE_TX_BUFFER_INDEX(g_uiUart2TxWriteIndex);
00206         }
00207         else{
00208             // TODO if the tx buffer is full
00209         }
00210     }
00211     if(!UART2_TX_BUFFER_EMPTY){
00212         // send as many characters to the uart buffer as many can
00213         UART2_primeTransmit();
00214     }
00215     // return the number of the character written into the buffer
00216     return uiIdx;
00217 }
00218 
00219 
00221 void UART2_sendChar(void)
00223 {
00224     // do we have anything to send in the buffer ?
00225     if(!UART2_TX_BUFFER_EMPTY){
00226         // Move as many bytes as we can into the tx buffer 
00227         UART2_primeTransmit();
00228     }  
00229     // If the output buffer is empty, turn off the transmit interrupt flag.
00230     else{
00231         // clear transmit interrupt flag (the first in the IFG2 vector)
00232         CLEAR_BIT(IFG2,1);
00233     }
00234 }
00235 
00236 
00238 tBoolean UART2_isWritingDone(void)
00240 {
00241     return ((UART2_TX_BUFFER_EMPTY) ? 1 : 0);
00242 }
00243 
00244 
00246 void UART2_setAppendResponseCallbackFunction(tpfUART2AppendResponseCallbackFunction pfCallbackAppendResponse)
00248 {
00249     g_pfOnCallbackGPRSAppendResponse = pfCallbackAppendResponse;
00250 }
00251 
00252 
00254 void UART2_flushRx(void)
00256 {
00257     tBoolean tbIsInterruptEnabled = 0;
00258     // get the content of the sr register   
00259     unsigned int uiStatus = _get_SR_register();
00260     // is global interrupts enabled ?
00261     if(TEST_BIT(uiStatus,3)){
00262         tbIsInterruptEnabled = 1;
00263          // temporarily turn off interrupts.
00264         _disable_interrupts();
00265     }
00266     // flush the receive buffer.
00267     g_uiUart2RxWriteIndex = 0;
00268     g_uiUart2RxReadIndex = 0;
00269     // switch back interrupts
00270     if(tbIsInterruptEnabled){
00271         _enable_interrupts();
00272     }
00273 }
00274 
00275 
00277 void UART2_flushTx(void)
00279 {
00280     tBoolean tbIsInterruptEnabled = 0;
00281     // get the content of the sr register   
00282     unsigned int uiStatus = _get_SR_register();
00283     // is global interrupts enabled ?
00284     if(TEST_BIT(uiStatus,3)){
00285         tbIsInterruptEnabled = 1;
00286          // temporarily turn off interrupts.
00287         _disable_interrupts();
00288     }
00289     // flusch the transmit buffer
00290     g_uiUart2TxWriteIndex = 0;
00291     g_uiUart2TxReadIndex = 0;
00292     // switch back interrupts
00293     if(tbIsInterruptEnabled){
00294         _enable_interrupts();
00295     }
00296 }
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